B. TECH. (COMPUTER ENGINEERING) - Punjabi University, Patiala

B. TECH SECOND YEAR
COMPUTER ENGINEERING (Batch 2012)
Session (2013-14) SCHEME OF PAPERS THIRD SEMESTER (COMPUTER ENGINEERING) |S. |Subject Code|Subject Name |L |T |P |Cr.|
|No. | | | | | | |
| |ECE-209 |Digital Electronic Circuits |3 |1 |0 |3.5|
| |CPE-201 |Computer Architecture |3 |1 |0 |3.5|
| |CPE-202 |Object Oriented Programming |3 |1 |0 |3.5|
| |CPE-203 |Operating Systems |3 |1 |0 |3.5|
| |CPE-204 |System Analysis & Design |3 |1 |0 |3.5|
| |CPE-205 |Discrete Mathematical Structure |3 |1 |0 |3.5|
| |ECE-259 |Digital Electronic Circuits Lab |0 |0 |2 |1.0|
| |CPE-252 |Object Oriented Programming Lab |0 |0 |2 |1.0|
| |CPE-253 |Operating System Lab |0 |0 |2 |1.0|
|Total |18 |6 |6 |24 |
|Total Contact Hours = 30 | ECE-259, CPE-252 and CPE-253 are practical papers only. There will not be
any theory examination for these papers.
University College of Engineering
Punjabi University, Patiala.
General Instructions to the Paper Setters
(Common for B.Tech. in Computer Engineering, Electronics and communication
Engineering, Mechanical Engineering, Civil Engineering and Integrated
BTech/MBA Branches) Applicable to 2010, 2011, 2012 Batches only
The B. Tech question paper structure will be as shown below:
|Pattern of Question Paper |
|TITLE OF SUBJECT (CODE----) |
|Bachelor of Technology (Branch) Section: ........... |
|End Semester Exam |
|TIME ALLOWED: 3 Hour |
|Roll. No............. |
|Maximum Marks: 45 |
| |
|Note:- Attempt four questions selecting one question from each |
|section A, B, C and D. Section E is compulsory. |
| |
|Section-A (From Section A of the syllabus) |
|Q1. |
|...................................................................|
|...... |
|Q2. |
|...................................................................|
|..... 1x9 |
| |
|Section-B (From Section B of the syllabus) |
|Q3. |
|...................................................................|
|...... |
|Q4. |
|...................................................................|
|...... 1x9 |
|Section-C (From Section C of the syllabus) |
|Q5. |
|...................................................................|
|...... |
|Q6. |
|...................................................................|
|...... 1x9 |
|Section-D (From Section D of the syllabus) |
|Q7. |
|...................................................................|
|...... |
|Q8. |
|...................................................................|
|...... 1x9 |
|Section-E (Common from Whole of the Syllabus) |
|Q9. |
|a).................................................................|
|........ |
|b) |
|...................................................................|
|...... |
|c) |
|...................................................................|
|...... |
|d) |
|...................................................................|
|...... |
|e) |
|...................................................................|
|...... |
|f) |
|...................................................................|
|...... |
|g) |
|...................................................................|
|...... |
|h) |
|...................................................................|
|...... |
|i).................................................................|
|........ |
|9x1 |
Note for the paper setter:
1. Numbers of questions to be set are nine (9) as per the above format.
2. Section A, B, C and D contain two questions of Nine (9) marks each.
However, nine marks question may be splitted into subparts.
3. Section E is compulsory and contains nine sub-parts of one mark each.
The answers for each question should preferably be of 2 to 3 lines.
4. The maximum limit on numerical questions to be set in the paper is 35%
while minimum limit is 20% except theoretical papers.
5. The paper setter shall provide detailed marking instructions and
solution to numerical problems for evaluation purpose in the separate
white envelopes provided for solutions.
6. The paper setters should seal the internal & external envelope
properly with signatures & cello tape at proper place.
7. Log tables, charts, graphs, Design data tables etc. should be
specified, whenever needed.
8. Use of Scientific calculator should be clearly specified.
9. There are some MBA subjects (like BAS 202 Operational Research, MBA
5011 Foundation of Financial Accounting, MBA 5012 Foundation of
Managerial Accounting, MBA 5022 Foundations of Marketing, MBA 5023
Foundations of Law, MBA 5031 Foundations of Macroeconomics, MBA 5032
Foundations of Microeconomics, MBA-5033 Foundations of International
Business, MBA 5013 Foundations of Finance) where syllabus is not
divided among four sections namely A,B,C,D then Question paper must be
set by without specifying section in it and giving proper weightage to
the respective portions.
ECE-209 DIGITAL ELECTRONIC CIRCUITS L T P Cr
3 1 0 3.5 Section-A Number Systems and Codes : Binary, Octal and Hexadecimal number systems,
Binary to decimal, Decimal to binary, Octal and hexadecimal to binary and
binary to octal and hexadecimal conversions, BCD code, Gray code,
Alphanumeric codes, Parity method for error detection.
Logic gates and Boolean Algebra: OR, AND and NOT operations and gates, NOR,
NAND, XOR and XNOR operations and gates, Evaluating logic circuit outputs,
Implementing circuits from Boolean expressions. Boolean theorems,
DeMorgan's theorem, universality of NAND and NOR gates, IEEE/ANSI standard
logic symbols. Section-B Combinational Logic Circuits: Sum of product form, Product of sum form,
Simplification of Boolean functions using algebric and Karnaugh map
methods. Half adder, Full adder, Half subtractor, full subtractor
circuits, Multiplication operation and ALU.
Combinational digital IC packages: Multiplexers, De-multiplexers, Code
converters, Combinational logic circuits. Some examples of Boolean gate ICs
and ICs implementing different combinational logic circuits. Section-C Sequential Circuits: RS, JK, D and T flip-flops circuits and their
conversions, Serial and parallel counters and shift registers, Universal
shift registers, Some examples of counter and shift register ICs.
Logi