WIPRO PAPER ON 14th JULY 2008 Hi This is paper of wipro on 14-7-08 ...
Give the output when the input of a D-flip flop is tied to the output through the
XOR gate. ... is the latch in? Implement the logic equation Y = C^BA^ + CB^A +
CBA with a multiplexer. (where C^ stands for C complement). Equivalent Gray
code ...... ME: VLSI IS THE HARDWARE IMPLEMENTATION AND VHDL IS THE
CODE.