MIPS Assembly Language Programming

MIPS Assembly Language Programming


Robert Britton
Computer Science Department
California State University, Chico
Chico, California



Instructors are granted permission to make copies of this beta version
textbook for use by students in their courses. Title to and ownership of
all intellectual property rights in this book are the exclusive property of
Robert Britton, Chico, California.






















Preface


This book is targeted for use in an introductory lower-division assembly
language programming or computer organization course. After students are
introduced to the MIPS architecture using this book, they will be well
prepared to go on to an upper-division computer organization course using a
textbook such as "Computer Organization and Design" by Patterson and
Hennessy. This book provides a technique that will make MIPS assembly
language programming a relatively easy task as compared to writing complex
Intel( 80x86 assembly language code. Students using this book will acquire
an understanding of how the functional components of a computers are put
together, and how a computer works at the machine language level. We assume
students have experience in developing algorithms, and running programs in
a high-level language.

Chapter 1 provides an introduction to the basic MIPS architecture, which is
a modern Reduced Instruction Set Computer (RISC). Chapter 2 shows how to
develop code targeted to run on a MIPS processor using an intermediate
pseudocode notation similar to the high-level language "C", and how easy it
is to translate this notation to MIPS assembly language.

Chapter 3 is an introduction to the binary number system, and the rules for
performing arithmetic, as well as detecting overflow. Chapter 4 explains
the features of the PCSpim simulator for the MIPS architecture, which by
the way is available for free. Within the remaining chapters, a wealth of
programming exercises are provided, which every student needs to become an
accomplished assembly language programmer. Instructors are provided with a
set of PowerPoint slides. After students have had an opportunity to develop
their pseudocode and their MIPS assembly language code for each of the
exercises, they can be provided with example solutions via the PowerPoint
slides.

In Chapter 5 students are presented with the classical I/O algorithms for
decimal and hexadecimal representation. The utility of logical operators
and shift operators are stressed. In Chapter 6, a specific argument passing
protocol is defined. Most significant programming projects are a teamwork
effort. Emphasis is placed on the importance that everyone involved in a
teamwork project must adopt the same convention for parameter passing. In
the case of nested function calls, a specific convention is defined for
saving and restoring values in the temporary registers. In Chapter 7 the
necessity for reentrant code is explained, as well as the rules one must
follow to write such functions. Chapter 8 introduces exceptions and
exception processing. In Chapter 9 a pipelined implementation of the MIPS
architecture is presented, and the special programming considerations
dealing with delayed loads and delayed branches are discussed. The final
chapter briefly describes the expanding opportunities in the field of
embedded processors for programmers who have a solid understanding of the
underlying processor functionality.


Robert Britton

October 2001
Contents

CHAPTER 1: The MIPS Architecture 1
1.1 Introduction 1
1.2 The Datapath Diagram 1
1.3 Instruction Fetch and Execute 2
1.4 The MIPS Register File 3
1.5 The Arithmetic and Logic Unit (ALU) 3
1.6 The Program Counter (PC) 4
1.7 Memory 5
1.8 The Instruction Register (IR) 5
1.9 The Control Unit 5
1.10 Instruction Set 6
1.11 Addressing Modes 7
1.12 Summary 8
Exercises 8
CHAPTER 2: Pseudocode 9
2.1 Introduction 9
2.2 Develop the Algorithm in Pseudocode 9
2.3 Register Usage Convention 12
2.4 The MIPS Instruction Set 12
2.5 Translation of an "IF THEN ELSE" Control Structure 13
2.6 Translation of a "WHILE" Control Structure 14
2.7 Translation of a "FOR LOOP" Control Structure 14
2.8 Translation of Arithmetic Expressions 15
2.9 Translation of a "SWITCH" Control Structure 16
2.10 Assembler Directives 17
2.11 Input and Output 18
Exercises 18
CHAPTER 3: Number Systems 21
3.1 Introduction 21
3.2 Positional Notation 21
3.3 Converting Binary Numbers to Decimal Numbers 22
3.4 Detecting if a Binary Number is Odd or Even 22
3.5 Multiplication by Constants that are a Power of Two 23
3.6 The Double and Add Method 23
3.7 Converting Decimal Numbers to Binary Numbers 24
3.8 The Two's Complement Number System 24
3.9 The Two's Complement Operation 25
3.10 A Shortcut for Finding the Two's Complement of any Number 25
3.11 Sign Extension 26
3.12 Binary Addition 26
3.13 Binary Subtraction 26
3.14 Overflow Detection 27
3.15 Hexadecimal Numbers 27
Exercises 28
CHAPTER 4: PCSpim The MIPS Simulator 31
4.1 Introduction 31
4.2 Advantages of a Simulator 31
4.3 The Big Picture 32
4.4 Analyzing the Text Segment 34
4.5 Analyzing the Data Segment 35
4.6 System I/O 36
4.7 Deficiencies of the System I/O Services 37
Exercises 38
CHAPTER 5: Algorithm Development 39
5.1 Introduction 39
5.2 Instructions that Perform Logical Operations 39
5.3 Instructions that Perform Shift Operations 41
5.4 Modular Program Design and Documentation 42
5.5 A Function to Print Values in Hexadecimal Representation 47
5.6 A Function to Read Values in Hexadecimal Representation 48
5.7 A Function to Print Decimal Values Right Justified 49
5.8 A Function to Read Decimal Values and Detect Errors 49
Exercises 50
CHAPTER 6: Function Calls Using the Stack 53
6.1 Introduction 53
6.2 The Stack Segment in Memory 53
6.3 Argument Passing Convention 53
6.4 Nested Function Calls and Leaf Functions 54
6.5 Local Variables are Allocated Space on the Stack 55
6.6 Frame Pointer 55
Exercises 56
CHAPTER 7: Reentrant Functions 59
7.1 Introduction 59
7.2 Rules for Writing Reentrant Code 59
7.3 Reentrant I/O Functions 60
7.4 Personal Computers 60
7.5 Recursive Functions 60
Exercises 61
CHAPTER 8: Exception Processing 63
8.1 Introduction 63
8.2 The Trap Handler 63
Exercises 65
CHAPTER 9: A Pipelined Implementation 67
9.1 Introduction 67
9.2 A Pipelined Datapath 68
9.3 PCSpim Option to Simulate a Pipelined Implementation 69
Exercises 69
CHAPTER 10: Embedded Processors 71
10.1 Introduction 71
10.2 Code Development for Embedded Processors 71
10.3 Memory Mapped I/O 72
10.4 References 72
APPENDIX A: Quick Reference 73
APPENDIX B: ASCII Codes 77
APPENDIX C: Integer Instruction Set 79
APPENDIX D: Macro Instructions 95
APPENDIX E: A Trap Handler 100







Related Web Sites





www.mips.com/


http://www.ecst.csuchico.edu/~britton

http://www.ecst.csuchico.edu/~scoth/51a/hidpcspim.html
http://www.cs.wisc.edu/~larus/SPIM/cod-appa.pdf
http://www.cs.wisc.edu/~larus/spim.html
CHAPTER 1

The MIPS Architecture

If at first you don't succeed,

Skydiving is definitely not for you.













1.1 Introduction

This book provides a technique that will make MIPS assembly language
programming a relatively easy task as compared to writing Intel( 80x86
assembly language code. We are assuming that you have experience in
developing algorithms, and running programs in some high level language
such as Pascal, C, C++, or JAVA. One of the benefits of understanding and
writing assembly language code is that you will have new insights into how
to write more efficient, high-level language code. You will become familiar
with the task that is performed by a compiler and how computers are
organized down to the basic functional component level. You may even open
new opportunities for yourself in the exploding field of embedded
processors.

The first thing everyone must do to apply this technique is to become
familiar with the MIPS architecture. The architecture of any computer is
defined by the registers that are available (visible) to the assembly
language programmer, the instruction set, the memory addressing modes, and
the data types.


1.2 The Datapath Diagram

It is very useful to have a picture of a datapath diagram that depicts the
essential components and features of the MIPS architecture. Please note
that there are many different ways that an architecture can be implemented
in hardware. These days, pipelined and superscalar implementations are
common in high-performance processors. An initial picture of a MIPS
datapath diagram will be the straightforward simple diagram shown in Figure
1.1. This is not a completely accurate diagram for the MIPS architecture;
it is just a useful starting point.


Figure 1.1 MIPS Simplified Datapath Diagram


1.3 Instruction Fetch and Execute

Computers work by fetching machine language instructions from memory,
decoding and executing them. Machine language instructions and the values
that are operated upon are encoded in binary. Chapter 3 introduces the
binary number system. As we progress through the first two chapters, we
will be expressing values as decimal values, but keep in mind that in an
actual MIPS processor these values are encoded in binary. The basic
functional components of the MIPS architecture shown in Figure 1.1 are:

(a) Program Counter (PC)

(b) Memory
(c) Instruction Register (IR)
(d) Register File
(e) Arithmetic and Logic Unit (ALU)
(f) Control Unit

Interconnecting all of these components, except the cont